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2D/3D Packaging

Stress-free joining of thin film wafers
Bonding of Hybrid systems
High mechanical unevenness is tolerated
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Revolutionizing Semiconductor Design

Chiplets are becoming increasingly important as they allow flexible combination of specialized semiconductor

Our Technology

Fine-pitch interconnects (5–10 µm) for chiplet stacking and 2.5D/3D ICs
1st-level interconnects (40–50 µm) with excellent thermal and electrical performance
2nd-level interconnects (>150 µm) for integration into conventional PCB designs
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Scalable Solution

Industrially scalable interconnect architecture
Coverage across the full packaging stack
Ultra-fine pitch interconnect capability
Seamless chip-to-system level integration
ADVANCED TECHNOLOGY

Process Advantages

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High Speed Cu-Sintering

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Low Temperature Process

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Bond Line Thickness
Fast Process
● Process could be done under 1 minute
Easy Process
● No Printing/Dispensing
● No Drying
● No Cleaning
Filling Up Irregularities
High mechanical unevenness is tolerated (>>10µm)
Excellent Bond Properties
● Bond line thickness <<3µm => Lowest inductivity
● Stress-free joining of thin film wafers
● 3µm – 300mm Contact 0Ω
● One Step- D2D, D2W, W2W Process
● Room temperature process KlettWelding

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